View FMS6407MTF20_3408714.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

rev. 1i july 2005 www.fairchildsemi.com features three video anti-aliasing or reconstruction ?ters 2:1 mux inputs for ypbpr / rgb or ypbpr / yc-cv inputs supports d1, d2, d3 and d4 video d-connector (eiaj cp-4120) selectable 8mhz/15mhz/30mhz 6th order ?ters plus bypass for sd (480i), progressive (480p) and hd (1080i/ 720p) ? c-coupled inputs include dc restore /bias circuitry all outputs can drive ac or dc coupled 75 ? loads and provide either 0db or 6db of gain 0.26% differential gain, 0.11?differential phase lead-free packaging applications progressive scan cable set top boxes satellite set top boxes ? vd players hdtv personal video recorders (pvr) ? ideo on demand (vod) description the fms6407 offers comprehensive ?tering for tv, set top box or dvd applications. this part consists of a triple 6th order ?ter with selectable 30mhz, 15mhz, or 8mhz cutoff frequencies. the ?ters may also be bypassed so that the bandwidth is limited only by the output ampli?rs. a 2 to 1 multiplexer is provided on each ?ter channel. the triple ?ters are intended for ypbpr, rgb and yc-cv signals. the dc clamp levels are set according to the input mux selection and the cv_sel control input. ypbpr sync tips are clamped to 250mv, 1.125v and 1.125v respectively while rgb sync tips are all clamped to 250mv. cv mode clamps y and cv to 250mv while c is clamped to 1.l25v. sync clamp timing can be derived from the y or green input channel or from the external sync_in pin. all channels nominally accept ac coupled 1vpp signals. selectable 0db or 6db gain allows the outputs to drive 1vpp or 2vpp signals into ac or dc coupled terminated loads with a 1vpp input. input signals cannot exceed 1.5vpp and outputs cannot exceed 2.5vpp. the fms6407 draws 525mw from a single 5.0v supply. fms6407 triple video drivers with selectable hd/progressive/sd/bypass filters functional block diagram gm 250mv y out / g out / y out gm gm rgb ext_sync sync_in y in g in / y in pb in pb out / b out / c out b in / c in pr in pr out / r out / cv out r in / cv in f sel0 f sel1 0db selectable 0db or 6db output gain 8mhz, 15mhz, 30mhz, bypass 8mhz, 15mhz, 30mhz, bypass 8mhz, 15mhz, 30mhz, bypass 250mv 1.125v 250mv 1.125v clamp control sync strip cv_se l
2 rev. 1i july 2005 data sheet fms6407 dc electrical speci?ations (t c = 25?, v i = 1v pp , v cc = 5.0v, all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) standard de?ition electrical speci?ations (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 0, f sel1 = 0, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) progressive scan (ps) electrical speci?ations (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 1, f sel1 = 0, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) symbol parameter conditions min typ max units i cc supply current 1 v cc no load 105 130 ma v i input voltage max 1.5 v pp v il digital input low 1 f sel1 , f sel2 , rgb, 0db, ext_sync, cv_sel, sync_in 0 0.8 v v ih digital input high 1 f sel1 , f sel2 , rgb, 0db, ext_sync, cv_sel, sync_in 2.4 v cc v v clamp1 output clamp voltage r,g,b,y,cv 250 mv v clamp2 output clamp voltage pb,pr,c 1.125 v psrr power supply rejection ratio dc (all channels) -40 db symbol parameter conditions min typ max units av sd sd gain, 0db = ? 1 all channels sd mode 5.6 6.0 6.4 db av sd sd gain, 0db = ? 1 all channels sd mode -0.4 0 0.4 db f 1dbsd -1db bandwidth for sd 1 all channels 5.5 6.75 mhz f csd -3db bandwidth for sd all channels 8.2 mhz f sbsd attenuation: sd (stopband reject) 1 all channels at f = 27mhz 40 56 db dg differential gain all channels 0.26 % d differential phase all channels 0.11 thd output distortion (all channels) v out = 1.8v pp at 1mhz 0.4 % x talk crosstalk (channel-to-channel) at 1.0mhz -65 db in muxiso in mux isolation at 1.0mhz -70 db snr signal-to-noise ratio all channels, ntc-7 weighting, 4.2mhz lowpass, 100khz highpass 73 db t pdsd propagation delay for sd delay from input to output at 4.5mhz 80 ns t1 sync to sync_in delay 10 ns t2 sync_in min pulse width 4 s symbol parameter conditions min typ max units av ps ps gain, 0db = ? 1 all channels ps mode 5.6 6.0 6.4 db av ps ps gain, 0db = ? 1 all channels ps mode -0.4 0 0.4 db f 1dbps -1db bandwidth for ps 1 all channels 10 13.5 mhz note: 1. 100% tested at 25?.
rev. 1i july 2005 3 fms6407 data sheet high de?ition electrical speci?ations (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 0, f sel1 = 1, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) bypass (wide bandwidth) electrical speci?ations (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 1, f sel1 = 1, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) f cps -3db bandwidth for ps all channels 15 mhz f sbps attenuation: ps (stopband reject) 1 all channels at f = 54mhz 40 48 db t pdps propagation delay for ps delay from input to output at 10mhz 45 ns t1 sync to sync_in delay 10 ns t2 sync_in min pulse width 2 s symbol parameter conditions min typ max units av hd hd gain, 0db = ? 1 all channels hd mode 5.6 6.0 6.4 db av hd hd gain, 0db = ? 1 all channels hd mode -0.4 0 0.4 db f 1dbhd -1db bandwidth for hd 1 all channels 20 28 mhz f chd -3db bandwidth for hd all channels 32 mhz f sbhd attenuation: hd (stopband reject) 1 all channels at f = 74.25mhz 30 40 db t pdhd propagation delay for hd delay from input to output at 20mhz 26 ns t1 sync to sync_in delay 10 ns t2 sync_in min pulse width 1.5 s symbol parameter conditions min typ max units av wb wb gain, 0db = ? 1 all channels wb mode 5.6 6.0 6.4 db av wb wb gain, 0db = ? 1 all channels wb mode -0.4 0 0.4 db f 1dbwb -1db bandwidth for wb all channels 50 mhz f cwb -3db bandwidth for wb all channels 80 mhz t pdwb propagation delay for wb delay from input to output at 20mhz 10 ns symbol parameter conditions min typ max units progressive scan (ps) electrical speci?ations (continued) (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 1, f sel1 = 0, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) note: 1. 100% tested at 25?.
4 rev. 1i july 2005 data sheet fms6407 absolute maximum ratings (beyond which the device may be damaged) note: functional operation under any of these conditions is not implied. performance and reliability are guaranteed only if operating conditions are not exceeded. reliability information note: package thermal resistance ( ja ), jedec standard multi-layer test boards, still air. recommended operating conditions p arameter min max units dc supply voltage -0.3 6 v analog and digital i/o -0.3 v cc + 0.3 v output current, any one channel (do not exceed) 60 ma p arameter min typ max units junction temperature 150 ? storage temperature range -65 150 ? lead temperature (soldering, 10s) 300 ? thermal resistance ( ja ), tssop-20 74 ?/w thermal resistance ( ja ), epad tssop-20 37.6 ?/w p arameter min typ max units operating temperature range 0 70 c v cc range 4.75 5.0 5.25 v input source resistance (r source ) 150 ?
rev. 1i july 2005 5 fms6407 data sheet sd noise vs. frequency -50 -80 noise (db) -100 -120 -90 -70 01.02.03 .0 4.0 5.0 6.0 f requency (mhz) -110 sd group delay vs. frequency 1 = 8.2mhz (38.13ns) sd frequency response -60 0.12 differential phase (deg) -0.04 0.00 0.08 0.04 1st sd differential phase 2nd 3rd 4th 5th 6th ntsc 0.1 differential gain (%) -0.4 -0.3 -0.1 0 -0.2 1st sd differential gain 2nd 3rd 4th 5th 6th ntsc 2 -70 -60 -50 -40 -30 -20 10 gain (10db/div) 400khz 5 10 15 25 20 30 f requency (mhz) 0 -10 -60 -40 -20 0 20 40 60 delay (ns) 400khz 5 10 15 25 20 30 f requency (mhz) 1 mkr frequency gain ref 400khz 6db 1 7.65mhz -1db bw 2 8.54mhz -3db bw 3 27mhz -53.82db f sbsd = gain (ref) ? gain (3) = 59.82db 3 1 min = -0.26 max = 0.00 ppmax = 0.26 min = -0.00 max = 0.11 ppmax = 0.11 standard de?ition typical performance characteristics (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 0, f sel1 = 0, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted)
6 rev. 1i july 2005 data sheet fms6407 progressive scan typical performance characteristics (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 1, f sel1 = 0, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) ps group delay vs. frequency ps frequency response 1 = 15mhz (20.32ns) -70 -50 -40 -30 -20 -10 10 gain (10db/div) 400khz 10 20 30 60 50 40 f requency (mhz) 0 -30 -20 -10 0 10 30 delay (10ns/div) 400khz 10 20 30 50 40 fr equency (mhz) 20 1 mkr frequency gain ref 400khz 6db 1 15.02mhz -1db bw 2 16.67mhz -3db bw 3 54mhz -56.37db f sbps = gain (ref) ? gain (3) = 62.37db 3 1 2 -60 high de?ition typical performance characteristics (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 0, f sel1 = 1, gain = 6db, r s = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) hd group delay vs. frequency hd frequency response 1 = 32mhz (8.60ns) -50 -40 -30 -20 -10 10 gain (10db/div) 400khz 10 20 30 90 50 40 f requency (mhz) 0 -20 -15 -5 0 5 15 delay (5ns/div) 400khz 10 20 30 90 40 fr equency (mhz) 10 80 70 60 80 70 60 50 1 mkr frequency gain ref 400khz 6db 1 29.52mhz -1db bw 2 33.10mhz -3db bw 3 74.25mhz -35.36db f sbhd = gain (ref) ? gain (3) = 41.36db 3 1 2 -10 -60
rev. 1i july 2005 7 fms6407 data sheet bypass (wide bandwidth) typical performance characteristics (t c = 25?, v i = 1v pp , v cc = 5.0v, f sel0 = 1, f sel1 = 1, gain = 6db, r source = 37.5 ? , all inputs ac coupled with 0.1 f, all outputs ac coupled with 220 f into 150 ? , referenced to 400khz; unless otherwise noted) wb group delay vs. frequency wb frequency response 1 = 80mhz (0.29ns) 6.5 gain (0.5db/div) 400khz 10 20 30 90 50 40 f requency (mhz) -0.8 -0.6 -0.2 0 0.2 1.2 delay (0.2ns/div) 400khz 10 20 30 100 40 fr equency (mhz) 1.0 80 70 60 0.8 0.6 0.4 90 80 70 60 50 mkr frequency gain ref 400khz 6db 1 60.16mhz -1db bw 2 87.55mhz -3db bw 1 2 -0.4 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 1
8 rev. 1i july 2005 data sheet fms6407 pin con?uration pin# pin type description 1 ext_sync input selects the external sync_in signal when set to logic ?? do not float 2 cv_sel input selects cv mode when set to logic ??(sets c clamp to 1.125v and cv clamp to 250mv), do not float 3y in input y (luminance) input may be connected to a signal which includes sync 4g in input green or y input 5pb in input pb input 6b in input blue or c (chrominance) input 7pr in input pr input 8r in input red or cv (composite video) input 9f sel0 input selects filter corner frequency or bypass, see table, do not float 10 f sel1 input selects filter corner frequency or bypass, see table, do not float 11 gnd input must be tied to ground, do not float 12 gnd input must be tied to ground, do not float 13 0db input selects output gain of 0db when set to logic ?? do not float 14 pr out output pr, red, or cv output 15 pb out output pb, blue, or c output 16 y out output y, green, or y output 17 rgb input selects rgb mux inputs and clamp mode when set to logic ?? do not float 18 sync_in input external sync input signal, square wave crossing vil and vih input thresholds, do not float 19 v cc input +5v supply, do not float 20 v cc input +5v supply, do not float fms6407 20-pin tssop or epad tssop ext_sync v cc cv_sel y in sync_in g in/ y pb in b in/ c pr in v cc rgb pb out pr out y out 1 2 3 4 5 6 7 20 19 18 17 16 15 14 r in/ cv 0db gnd f sel0 f sel1 gnd 8 9 10 13 12 11
rev. 1i july 2005 9 fms6407 data sheet filter settings f sel1 , pin 10 f sel0 , pin 9 filter -3db freq video format sync format 0 0 8.2mhz sd, 480i bi-level, 4.7 s pulse width 01 15mhz ps, 480p bi-level, 2.35 s pulse width 1 0 32mhz hd, 1080i, 720p tri-level, 589ns pulse width 11 filter bypass bi-level, 2.35 s pulse width i/o and clamp settings rgb, pin 17 cv_sel, pin 2 input output clamp voltage 0 x (don? care) y, pin 3 y, pin 16 250mv pb, pin 5 pb, pin 15 1.125v pr, pin 7 pr, pin 14 1.125v 1 0 g/y, pin 4 g, pin 16 250mv b/c, pin 6 b, pin 15 250mv r/cv, pin 8 r, pin 14 250mv 1 1 y/g, pin 4 y, pin 16 250mv c/b, pin 6 c, pin 15 1.125v cv/r, pin 8 cv, pin 14 250mv * video level, does not include clamp voltage which will offset the input above ground. gain settings 0db, pin 13 gain (db) v in *v out * 0 6 1v pp 2v pp 101v pp 1v pp sync settings ext_sync, pin1 sync source 0 y/g input, pin 3/4 1 sync_in input, pin 2
10 rev. 1i july 2005 data sheet fms6407 functional description introduction the fms6407 is a next generation ?ter solution from f airchild semiconductor addressing the expanding ?tering needs for televisions, set top boxes, and dvd players including progressive scan capability. the product provides selectable ?tering with cutoff frequencies of 30mhz, 15mhz, and 8.0mhz on the ypbpr, rgb and yc-cv channels. in addi- tion, the ?ters can be bypassed for wider bandwidth applica- tions. the fms6407 allows consumer devices to support a v ariety of resolution standards with the same hardware. multiplexers on the ypbpr / rgb / yc-cv channels provide further ?xibility. when the input multiplexer is changed from ypbpr to rgb mode the sync tip clamp voltages are changed appropriately. all three channels are set for 250mv sync tips to reduce dc-coupled power dissipation for rgb inputs. the lower output bias voltage is not suitable for the pbpr outputs so for ypbpr inputs these signals are clamped to 1.125v while y is still clamped to 250mv. for systems running ypbpr and yc-cv signals, the y and cv signals will be clamped to 250mv while c is clamped to 1.125v. sync tip clamping voltages are set by forcing the desired dc bias level during the active sync period. for systems without sync on green, an external sync input is provided. if sync e xists on the y input signal but not on the g input signal, the rgb and ext_sync control inputs may be wired together on the pcb to switch the sync source with the input source. both standard de?ition (bi-level) and high de?ition (tri- level) sync are supported at yin and sync_in depending on the fsel[1:0] inputs. standard de?ition (480i) and progressive (480p) signals are clamped by forcing the signal to the desired voltage during the sync pulse. for signals with sync, the sync tip itself will be forced to the clamp voltage (typically 250mv). when high de?ition sync is present (tri-level sync) the sync tip duration is too short to allow this approach. in order to accu- rately clamp hd signals, the sync pulse starts a timer and the actual clamping is done at the blanking level right after the sync pulse. the sync tip will still typically be placed at 250mv. all three outputs are driven by ampliers with selectable gains of 0db or +6db. these ampliers can drive two terminated video loads (75 ? ) to 2vpp with a 1vpp input when set to 6db g ain. the input range is limited to 1.5v pp and the output range is limited to 2.5v pp . all control inputs must be tied to v ss or v cc . do not leave them ?ating. external sync mode the fms6407 can properly recover sync timing from video signals that include sync. if the y-input video signals does not include sync, the fms6407 can be used in external sync mode. when the fms6407 is used in external sync mode, (ext_sync pin is high), a pulsed input must be applied to the sync_in pin. if there is no video signal present, therefore no sync signal present, there must still be an input applied to the sync_in pin. when there is no video signal on the video inputs sync_in can be a sync pulse every 60 s to mimic the slowest sync in a regular video signal. the following two sections discuss the sync processing and timing required in more detail. sd and progressive scan video sync processing the fms6407 must control the dc offset of ac-coupled input signals since the average dc level of video varies with image content. if the input offset is allowed to wander, the common mode input range of the ampli?rs can be exceeded leading to signal distortion. dc offset adjustment is referred to as clamping or in some cases, biasing, and must be done at the correct time during each video line. the optimum time is during the sync pulse since it is the lowest input voltage. this approach works well for 480i and 480p signals since the sync tip duration is long enough to allow the dc-offset errors to be compensated from line to line. the dc-offset of the sync tip is adjusted as illustrated in figure 1 by forcing a current on the input during the sync pulse. the sync tip will be clamped to approximately 250mv. signals like pb and pr with a symmetric voltage range (?50mv) will be clamped to approximately 1.125v. note that the following diagrams indicate output voltage levels for both 0db and 6db gain (1v pp and 2v pp video signals at the fms6407 output pin). figure 1. bi-level sync tip clamping and bias in some cases, the sync voltage may be compressed to less than the nominal 300mv value. the fms6407 can success- fully recover sd and progressive scan sync which is greater than 100mv (compressed to 33% of nominal). the fms6407 can properly recover sync timing from luma and green which include sync. if none of the video signals includes sync, the ext_sync control input can be set high required sync tip offset a v *300mv a v *700mv a v = 1 (0db) or 2 (6db) active video 250mv 250mv 550mv 850mv 1250mv 2250mv 0mv 0mv 775mv 425mv 1475mv 1875mv 1125mv 1125mv required pb offset active video active video 0db gain 6db
rev. 1i july 2005 11 fms6407 data sheet and an external sync signal must be input on the sync_in pin. refer to the external sync section for more details. the timing required for this operating mode is shown in figure 2. figure 2. bi-level external sync clamping and bias hd video sync processing when the input signal is a high de?ition signal, the tri-level sync pulse is too short to allow proper clamp operation. rather than clamp during the sync pulse, the sync pulse is located and the signal is clamped to the blanking level. this is done in such a way that the sync tip will still be set to approximately 250mv. the ext_sync control input selects the sync stripper output or the sync_in pin for use by the clamp circuit. this means that the sync_in timing for hd signals is different than the timing for sd or ps sig- nals. for hd signals, the sync_in signal must be high when the clamp must be active. this is during the time immediately after the sync pulse while the signal is at the blanking level. this operation is shown in figure 3. note that the following diagrams indicate output voltage levels for both 0db and 6db gain (1v pp and 2v pp video signals at the fms6407 output pin). figure 3. tri-level blanking clamp note: t ri-level sync may only be compressed 5%. if tri-level sync is compressed more than 5% it may not be properly located. sync timing normally, the fms6407 will respond to bi-level sync and clamp the sync tip during period ? in figure 4(a). when the ?ters are switched to high de?ition mode (30mhz) the sync processing will respond to tri-level sync and clamp to the blanking level during period ? in figure 4(b). figure 4. sync timing; bi-level (a), tri-level (b) the tri-level sync pulse is located such that the broad pulses in the vertical interval do not trigger the clamp. in order to improve the system settling at turn-on, the broad pulses will be clamped to just above ground. once the broad pulses (and tri-level sync tips) are above ground, the normal clamping process takes over and clamps to the blanking level during period ? in figure 4(b). the fms6407 is designed to support the video standards and associated sync timings shown in table i on page 12 (additional standards such as 483p59.94 will also work correctly). the ?ter settings table from page 9 is repeated on page 12 for convenience. ab c b 250mv 850mv 2250mv 1450mv ab c 250mv 850mv 2250mv 480i and 480p 720p and 1080i (a) (b) 250mv 250mv 550mv 850mv 1250mv 2250mv 850mv 1450mv 0mv 0mv required sync tip offset (next sync tip will be offset correctly) active video a v *300mv a v *700mv a v *300mv tr ue sync position allowable sync_in t1 t2 0h 0db gain 6db a v = 1 (0db) or 2 (6db) 250mv 250mv 950mv 1650mv 0mv 0mv required blanking offset a v *700mv tr ue sync position allowable sync_in active video t1 t2 a v = 1 (0db) or 2 (6db) 0db gain 6db
12 rev. 1i july 2005 data sheet fms6407 filter settings tab le i f sel1 , pin 10 f sel0 , pin 9 filter -3db freq video format sync format 0 0 8.2mhz sd, 480i bi-level, 4.7 s pulse width 01 15mhz ps, 480p bi-level, 2.35 s pulse width 1 0 32mhz hd, 1080i, 720p tri-level, 589ns pulse width 11 filter bypass bi-level, 2.35 s pulse width format refresh sample rate period (t) a b c h-rate 480i 30hz 13.5mhz 74ns 20t = 1.5 s 64t = 4.7 s 61t = 4.5 s 15.75khz 480p 60hz 27mhz 37ns 20t = 750ns 64t = 2.35 s 61t = 2.25 s 31.5khz 720p 60hz 74.25mhz 13.4ns 70t = 938ns 40t = 536ns 220t = 2.95 s 45khz 1080i 30hz 74.25mhz 13.4ns 44t = 589ns 44t = 589ns 148t = 1.98 s 33.75khz note: timing values are approximate for 30hz/60hz refresh rates. application information input circuitry the dc restore circuit in the fms6407 requires a source impedance (r source = r s || r t ) of less than or equal to 150 ? for correct operation. driving the fms6407 with a high- impedance source (e.g. a dac loaded with 330 ? ) will not yield optimum results. output drive the fms6407 is speci?d to operate with output currents typically less than 60ma, more than suf?ient for a dual (75 ? ) video load. internal ampli?rs are current limited to approximately 100ma and should withstand brief duration short circuit conditions, however this capability is not guaranteed. the maximum speci?d input voltage of 1.5v pp can be sus- tained for all inputs. when the input is clamped to 1.125v, this does not result in a meaningful output signal. with a gain of 6db, the output should be 1.125v ?.5v which is not possible since the output cannot drive below ground. this condition will not damage the part; however, the output will be clipped. for signals which are clamped to 250mv, this does not occur. signals that are at midscale during sync (pb, pr, c) must be clamped to 1.125v and signals that are at their lowest during sync (y, cv, r, g, b) must be clamped to 250mv for proper operation. clamping a cv signal to 1.125v will result in clipping the top of the signal and clamping a pr sig- nal to 250mv will result in clipping the bottom of the signal. the 220 f capacitor coupled with the 150 ? termination, as shown in the typical application circuit of figure 5, forms a high pass ?ter that blocks the dc while passing the video frequencies and avoiding tilt. any value lower than 220 f will create problems, such as video tilt. higher values, such as 470 f - 1000 f are the most optimal output coupling capacitor. by ac coupling, the average dc level is zero. thus, the output voltages of all channels will be centered around zero. sync recovery the fms6407 will typically recover bi-level sync with amplitude greater than 100mv (33% compressed relative to the nominal 300mv amplitude). the fms6407 looks for the lowest signal voltage and clamps this to approximately 250mv at the output. t ri-level sync may not be compressed more than 5% (15mv) for correct operation. tri-level sync is located by ?ding the edges of the tri-level pulse and running a timer to operate the clamp during the back porch interval. since only the y/g channel is processed for sync recovery, y and cv inputs must be synchronous.
rev. 1i july 2005 13 fms6407 data sheet po wer dissipation the fms6407 output drive con?uration must be considered when calculating overall power dissipation. care must be taken not to exceed the maximum die junction temperature. the following example can be used to calculate the fms4607s power dissipation and internal temperature rise. t j = t a + p d ? ja where p d = p ch1 + p ch2 + p ch3 and p chx = v s ?i ch - (v o 2 /r l ) where v o = 2v in + 0.280v i ch = (i cc / 3) + (v o /r l ) v in = rms value of input signal i cc = 105ma v s = 5v r l = channel load resistance board layout can also affect thermal characteristics. refer to the layout considerations section for more information. the fms6407 is speci?d to operate with output currents typically less than 60ma, more than suf?ient for a single (150 ? ) video load. internal ampli?rs are current limited to a maximum of 100ma and should withstand brief dura- tion short circuit conditions, however this capability is not guaranteed. layout considerations general layout and supply bypassing play major roles in high frequency performance and thermal characteristics. f airchild offers a demonstration board, fms6407demo, to use as a guide for layout and to aid in device testing and characterization. the fms6407demo is a 4-layer board with a full power and ground plane. for optimum results, follow the steps below as a basis for high frequency layout: include 10 f and 0.1 f ceramic bypass capacitors place the 10 f capacitor within 0.75 inches of the power pin place the 0.1 f capacitor within 0.1 inches of the power pin connect all external ground pins as tightly as possible, preferably with a large ground plane under the package layout channel connections to reduce mutual trace inductance minimize all trace lengths to reduce series inductances. if routing across a board, place device such that longer traces are at the inputs rather than the outputs. if using multiple, low impedance dc coupled outputs, special layout techniques may be employed to help dissipate heat. f or dual-layer boards, place a 0.5?to 1?(1.27cm to 2.54cm) square ground plane directly under the device and on the bottom side of the board. use multiple vias to connect the ground planes. for multi-layer boards, additional planes (connected with vias) can be used for additional thermal improvements. w orse case additional die power due to dc loading can be estimated at (v cc 2 /4r load ) per output channel. this assumes a constant dc output voltage of v cc 2 . for 5v v cc with a dual dc video load, add 25/(4*75) = 83mw, per channel. a package option with an exposed dap is available for improved thermal performance, see ordering information on page 16. for layout recommendations using the epad pack- age , refer to the following: http://www.amkor.com/products/ notes_papers/epad.pdf
14 rev. 1i july 2005 data sheet fms6407 fms6407 20l tssop may also be dc coupled 16 15 14 20 19 +5v 12 11 y out pb out pr out v cc v cc gnd gnd note: pins 1, 2, 9, 10, 13, 17, and 18 will need to be set according to the input signal format 0.1 f r t 75 3 y in 0.1 f 4 g in /y 0.1 f 5 pb in 0.1 f 6 b in /c 0.1 f 7 pr in 0.1 f 8 r in /cv y in 0.1 f1 f 220 f 75 75 video cables 75 220 f 75 75 video cables 75 220 f 75 75 video cables 75 r s 75 r t 75 g in /y r s 75 r t 75 pb in r s 75 r t 75 b in /c r s 75 r t 75 pr in r s 75 r t 75 r in /cv r s 75 r source = r s || r t figure 5. typical application circuit
rev. 1i july 2005 15 fms6407 data sheet pa ck ag e dimensions tssop-20 and epad tssop-20 side view end view to p view section "b-b" even lead sides topv iew odd lead sides to pview detail "a" exposed pad view b b n 1.00 dia. 7 1 2 3 1.00 1.00 d a-b c 0.20 c m bbb a-b 9 b a d e1 e d 4 e/2 4 4 b 5 2x n/2 tips a e a 1 5 a 2 seating plane 8 aaa b1 (b) (c) c1 scale: 120/1 (see note 10) with plating base metal 0.05 3 h c c c 0.25 h 6 l pa rt i n g line (oc) scale: 30/1 (view rotated 90 c.w.) 13 p1 p (14) (14) (1.00) 13 c see detail "a" c l e/2 x x = a and b x = a and b x d 8. 7. controlling dimension: millimeters. 11. 1. die thickness allowable is 0.2790.0127 (.0110.0005 inches) protrusion. allowable dambar protrusion shall be the lead width dimension does not include dambar 9. one another within 0.076mm at seating plane. 6. 5. 3. 2. formed leads shall be planar with respect to terminal positions are shown for reference only. for soldering to a substrate. dimension is the length of terminal on e per side. flash or protrusions shall not exceed 0.15mm on d and 0.25mm protrusions, and are measured at the bottom parting line. mold "d" & "e1" are reference datum and do not include mold flash or da tum plane h located at mold parting line and coincident dimensioning & tolerances per asme. y14.5m-1994. 0.07mm total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and an adjacent lead should be 0.07mm for 0.65mm pitch, 0.08mm for 0.50mm pitch and to 0. 25 mm from the lead tip. section "b-b" to be determined at 0.10 10. this part is compliant with jedec specification mo-153 12. va riations aa/aat, ab-1/abt-1, ab/abt, ac/act, ad/adt, ae/aet da tum a-b and d to be determined where centerline 4. between leads exits plastic body at datum plane h. with lead, where lead exits plastic body at bottom of parting line. 0.07mm for 0.40mm pitch packages. see section "b-b". end user should verify available size of exposed pad for specific shown are maximum size of exposed pad within lead count and body size. device application. dimensions "p" and "p1" are thermally enhanced variations. values 13. bc-1/bct-1, bd-1/bdt-1, be/bet, ca/cat & cd/cdt and mo-194 variations ac/act & af/aft. notes: common dimensions min. max. note l a1 e e e1 d c b a nom. a2 0.65 bsc 0.90 0.20 0.30 0.15 1.10 0.05 0.19 0.09 4.30 4.40 4.50 0.50 0.60 6.40 bsc 0.70 b1 0.19 0.22 0.25 0.09 0.16 c1 0.85 0.95 bbb 0.10 sym 0.076 aaa 6 5 5 9 0.127 6.40 6.60 6.50 0 p1 p c o n 3.0 4.2 20 13 13 8 7 note: for 0.65mm pitch. all dimensions in millimeters.
16 rev. 1i july 2005 data sheet fms6407 ordering information te mperature range for all parts: 0? to +70?. model part number lead free pa ck ag e container pack qty fms6407 fms6407mtc20 yes tssop-20 tube 94 fms6407 fms6407mtc20x yes tssop-20 tape and reel 2500 fms6407 FMS6407MTF20 yes epad tssop-20 tube 94 fms6407 FMS6407MTF20x yes epad tssop-20 tape and reel 2500
www.fairchildsemi.com ?2005 fairchild semiconductor corporation fms6407 data sheet ',6&/$,0(5 )$,5&+,/'6(0,&21'8&7255(6(59(67+(5,*+7720$.(&+$1*(6:,7+ 287)857+(5127,&(72$1< 352'8&76+(5(,172,03529(5(/,$%,/,7<)81&7,2125'(6,*1)$, 5&+,/''2(6127$6680($1</,$%,/,7< $5,6,1*2872)7+($33/,&$7,212586(2)$1<352'8&725&,5&8,7 '(6&5,%('+(5(,11(,7+(5'2(6,7 &219(<$1</,&(16(81'(5,763$7(175,*+761257+(5,*+762)2 7+(56 75$'(0$5.6 7khiroorzlqjduhuhjlvwhuhgdqgxquhjlvwhuhgwudghpdunv)dlufk log6hplfrqgxfwrurzqvrulvdxwkrul]hgwrxvhdqglv qrwlqwhqghgwrehdqh[kdxvwlyholvwridoovxfkwudghpdunv /,)(683325732/,&< ) $,5&+,/'?6352'8&76$5(127$87+25,=(')2586($6&5,7,&$/&20 321(176,1/,)(6833257 '(9,&(6256<67(06:,7+2877+((;35(66:5,77(1$33529$/2))$,5 &+,/'6(0,&21'8&725&25325$7,21 $v xvhg khuhlq /lih vxssruw ghylfhv ru v\vwhpv duh ghylfhv ru v\vwhpvzklfkdduhlqwhqghgiruvxujlfdolpsodqwlqwr wkh erg\ ru e vxssruw ru vxvwdlq olih ru f zkrvh idloxuh wr shuirup zkhq surshuo\ xvhg lq dffrugdqfh zlwklqvwuxfwlrqviruxvhsurylghglqwkhodeholqjfdqeh uhdvrqdeo\h[shfwhgwruhvxowlqvljqlilfdqwlqmxu\wrwkh xvhu $fulwlfdofrpsrqhqwlvdq\frpsrqhqwridolih vxssruwghylfhruv\vwhpzkrvhidloxuhwrshuirupfdq ehuhdvrqdeo\h[shfwhgwrfdxvhwkhidloxuhriwkholih vxssruw ghylfh ru v\vwhp ru wr diihfw lwv vdihw\ ru hiihfwlyhqhvv 352'8&767$786'(),1,7,216 'hilqlwlrq ri 7hupv 'dwdvkhhw ,ghqwlilfdwlrq 3urgxfw6wdwxv 'hilqlwlrq $gydqfh,qirupdwlrq 3uholplqdu\ 1r,ghqwlilfdwlrq1hhghg 2evrohwh 7klv gdwdvkhhw frqwdlqv wkh ghvljq vshflilfdwlrqv iru surgxfwghyhorsphqw6shflilfdwlrqvpd\fkdqjhlq dq\pdqqhuzlwkrxwqrwlfh 7klvgdwdvkhhwfrqwdlqvsuholplqdu\gdwddqg vxssohphqwdu\gdwdzlooehsxeolvkhgdwdodwhugdwh )dlufklog6hplfrqgxfwruuhvhuyhvwkhuljkwwrpdnh fkdqjhvdwdq\wlphzlwkrxwqrwlfhlqrughuwrlpsuryh ghvljq 7klv gdwdvkhhw frqwdlqv ilqdo vshflilfdwlrqv )dlufklog 6hplfrqgxfwruuhvhuyhvwkhuljkwwrpdnhfkdqjhvdw dq\wlphzlwkrxwqrwlfhlqrughuwrlpsuryhghvljq 7klv gdwdvkhhw frqwdlqv vshflilfdwlrqv rq d surgxfw wkdwkdvehhqglvfrqwlqxhge\)dlufklogvhplfrqgxfwru 7khgdwdvkhhwlvsulqwhgiruuhihuhqfhlqirupdwlrqrqo\ )rupdwlyhru ,q'hvljq )luvw3urgxfwlrq )xoo3urgxfwlrq 1rw,q3urgxfwlrq ,qwhool0$;? ,623/$1$5? /lwwoh)(7? 0,&52&283/(5? 0lfur)(7? 0lfur3dn? 0,&52:,5(? 06;? 06;3ur? 2&;? 2&;3ur? 2372/2*,& ? 23723/$1$5? 3$& 0$1? )$67 ? ) $67u? )36? )5)(7? *oredo2swrlvrodwru? *72? +l6h&? , &? l/r ? ,psolhg'lvfrqqhfw? 5hy, $&([? $fwlyh$uud\? %rwwrpohvv? &rro)(7? &526692/7 ? '20(? (fr63$5.? ( &026? (q6ljqd? ) $&7? )$ &74xlhw6hulhv? 323? 3rzhu? 3rzhu(gjh? 3rzhu6dyhu? 3rzhu7uhqfk ? 4)(7 ? 46? 472swrhohfwurqlfv? 4xlhw6hulhv? 5dslg&rqiljxuh? 5dslg&rqqhfw? m 6hu'hv? 6,/(176:,7&+(5 ? 60$5767$57? 630? 6 whdowk? 6xshu)(7? 6xshu627? 6xshu627? 6xshu627? 6\qf)(7? 7lq\/rjlf ? 7,1<2372? 7ux7udqvodwlrq? 8+&? 8owud)(7 ? 8ql)(7? 9&;? $furvvwkherdug$urxqgwkhzruog? 7kh3rzhu)udqfklvh ? 3urjudppdeoh$fwlyh'urrs?

▲Up To Search▲

Price & Availability of FMS6407MTF20

	To Download FMS6407MTF20 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .